Design For Test Engineer

Location: San Diego, California
Date Posted: 10-16-2017
Novus' client's Digital ASIC Design Team is currently seeking candidates for a senior position responsible for the implementation of advanced DFT/DFD(design for test/design for debug) techniques for low power, high performance and highly integrated SoCs including CODEC and high-speed PHY & SerDes systems. The successful candidate will help in the deployment of DFT methodologies that reduce test cost, increase production quality and enhance yield learning. Deployment and implementation of advanced DFT/DFD(design for test/design for debug) techniques for low power, high performance and highly integrated SoCs including CODEC and high-speed PHY & SerDes systems. Deployment of DFT methodologies that reduce test cost, increase production quality and enhance yield learning.

 
- Strong fundamental knowledge of DFT/DFD techniques for high performance processors.
- Understanding of core-based test methodology and scan isolation.
- Knowledge in fault modeling Stuck-at, Transition, Path Delay, Gate-Exhaustive, IDDQ, and other advanced DFT models.
- Knowledge in JTAG, MBIST, Scan Compression, ATPG, Fault Simulation and at-speed testing.
- Experience with industry ATPG tools Synopsys Tetramax, Cadence Encounter Test or Mentor Fastscan ATPG tools.
- Synopsys DFTC scan insertion.
- Experience in Logic Design, VHDL, Verilog RTL, verification, and static timing analysis.
- Working knowledge in one or more of the following; C, C++, TCL or Perl.
- Experience with industry simulation tools such as VCS, Modelsim, or others.
- Direct experience in silicon bring-up, debug, and validation of DFT features on ATE.
- Detail oriented with strong organizational, problem solving and communication skills. Desired Experience:
- Experience in design and verification of the above; layout, SPICE simulation, etc.
- Experience with formal verification tools such Verplex, Formality, etc.
- Knowledge and experience of timing closure and industry tools like PrimeTime and PTSI.
- Experience with other industry tools such as Vera, Spyglass, 0-in, Jasper, RedHawk, PrimePower.
- Hands-on experience with Mentor DFT tools
 
Technical Recruiter
Novus Resources
resumes@novus-resources.com  


 
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