Post-Si Validation and Automation Engineer

Location: San Diego, California
Date Posted: 01-22-2018
Novus' client's Validation Team is part of the central SoC digital hardware organization responsible for the overall quality of the SoC silicon. The Validation team works closely with architects, designers, verification engineers, software engineers, and customers. The team is currently seeking candidates specifically in SOC validation and integration in pre-silicon emulation check-out and post-silicon regression, PVT test areas. Technical disciplines, languages and methodologies included in this team are: - SoC Test Content Integration (SoC, C, Assembly, Subsystems: CPU Core, Multimedia, IO, Peripherals, DDR, Wireless, Modem) - Regression Test (Emulation Build Validation, Post-Si Regressions) - PVT automation (Test development and integration, report generation and analysis, System Debug) All Qualcomm employees are expected to actively support diversity on their teams, and in the Company.
Minimum Qualifications:
Candidate will have a minimum of 3 years of experience working in emulation and silicon environments. Candidates are expected to have experience in:
- Emulation environments for development and debug
- Debugging low level software and hardware issues
- Implementing drivers and test content
- Debug tools including JTAG and kernel debuggers
- CPU and SoC architectures
- Basic understanding of power and performance
- Experience programming in C
Preferred Qualifications:
- Experience with post-silicon enabling and bring-up
- Using Lab Equipment
- Some programming and scripting languages (C, Assembly, Perl, Python, etc.)
- Basic debug skills to isolate issues between boards, sockets, and devices
- Knowledge of TCU, PVT, Fmax, Vmin test methodology and hands-on experience
Required: Bachelor's, Computer Science and/or Electrical Engineering
Preferred: Master's, Computer Engineering or equivalent experience
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