Digital Design Engineers for Mixed Signal ASICs

Location: San Diego, California
Date Posted: 02-05-2018
Job Overview:
Candidate who can work in a dynamic team environment with aggressive schedule, chip power consumption and area targets. Responsibilities include:
  • Digital design and analog/mixed signal design support for PLL, DAC, ADC and other mixed-signal designs.
  • Digital design aspects include full behavioral level description with high level synthesis languages and gate level synthesis, logic level synthesis, timing closure, power and signal integrity analysis and testability.
  • Analog/mixed-signal support includes behavioral modeling of RF and analog blocks using Verilog in the cadence AMS environment and analog/digital integration and verification methodologies using Cadence AMS.

Minimum Qualifications:
Five years of relevant experience with the following:
-> Digital ASIC design including architecture.
-> RTL design for control and datapath, linting, synthesis, STA, and DFT.
-> Experience with leading-edge ASIC development tools from Synopsys, Mentor, or Cadence.

Preferred Qualifications:
Experience designing mixed signal interfaces and integrating digital modules into mixed-signal ASICs

Required: Bachelor's, Electrical Engineering
Preferred: Master's, Electrical Engineering
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