Post-Si Test and Debug Engineer

Location: San Diego, California
Date Posted: 02-05-2018
Job Overview:
Validation Team is part of the central SoC digital hardware organization responsible for the overall quality of the SoC silicon. This team works closely with architects, designers, verification engineers, software engineers, and customers. The team is currently seeking a candidate for the position of Electrical Failure Analysis engineer. In this role, you'll work on debugging the failing systems (from the internal testing or customer returns), understand the root cause and implement corrective actions through design and test enhancements. You will also work on the automation of failure analysis techniques, so tests can narrow down the failure to a specific circuit or function. Main focus will be on the CPU and DDR system failures at SoC level with the opportunity to work on emulation platforms to verify the normal system behavior.

Minimum Qualifications:
Candidate will have three or more years of experience working in silicon environment in SoC debug and development using JTAG and Kernel Debuggers. Experience with ARM CPU and SoC architectures, DDR Protocol and Spec is a must. Strong C and Python programming skills and familiarity with emulation environments is required.

Preferred Qualifications:
  • 8-12 years industry experience.
  • Strong SoC silicon debug background solving hardware and software problems.
  • Solid experience in post-silicon enabling and bring-up.
  • Strong C or Python/Perl scripting experience, including tool creation and flow automation.
  • Using lab equipment (scope and protocol analyzer).


Education:
Required: Bachelor's, Computer Engineering and/or Computer Science and/or Electrical Engineering
Preferred: Master's, Computer Engineering or equivalent experience
 
Technical Recruiter
Novus Resources
resumes@novus-resources.com  


 
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