DDR SIPI Engineer

Location: San Diego, California
Date Posted: 02-14-2018
Job Overview:
The primary role of this position is to conduct system level LPDDR4X/5 analysis including: on-chip IO FET & IBIS subckts, extracted package model, extracted PCB model, DRAM package & IO model, and on-chip & off-chip decoupling scheme. HSPICE and XA are the primary simulation tools utilized for analysis. Electro-magnetic extraction experience is a plus, although most of the EM models are delivered by other departments. Analysis results will be reported and fed back to the IO, package, and PCB designers for the purpose of bettering the design and improving overall performance. Multiple reports will be generated and posted/linked to the final sign-off checklist. Additional opportunities may also become available for working on development projects supporting the infrastructure and methodology behind the sign-off execution flow.

Must have 10+ years experience in the field of SIPI analysis with experience in SPICE simulation and utilizing S-parameter and Broadband SPICE models for system-level high-speed time domain analysis.

Ideally the candidate would also have the following skill-sets:
  • Experience running 3D full-wave electro-magnetic field solvers.
  • Experience working on frequency domain circuit analysis, and some level of bench-top lab measurement experience.
  • A background in measurement/simulation correlation would be a plus.

Required: Bachelor's, Electrical Engineering
Preferred: Master's or equivalent experience
Technical Recruiter
Novus Resources

this job portal is powered by CATS