Post-Si Validation and Integration Engineer

Location: San Diego, California
Date Posted: 07-17-2018
Come join our team!
We are looking for a special person to fill this contract position with our client, one of the leading semiconductor companies in the business. This is a great way to “get your foot in the door”!

Job Overview:
Our Validation Team is part of the central SoC digital hardware organization responsible for the overall quality of the SoC silicon. The Validation team works closely with architects, designers, verification engineers, software engineers, and customers.

The team is currently seeking candidates specifically in SOC validation and integration in pre-silicon emulation and post-silicon regression, PVT test areas. Technical disciplines, languages and methodologies included in this team are: DDR related debug, DDR training, Regression and PVT testing (Emulation Build Validation, Post-Si Regressions).
 
Minimum Qualifications:
Three or more years of experience in the following:
  • Emulation environments for development and debug.
  • Debugging low level software and hardware issues.
  • Implementing drivers and test content.
  • Debug tools including JTAG and kernel debuggers.
  • CPU and SoC architectures.
  • Basic understanding of power and performance.
  • Experience programming in C.
  • Familiarity with DDR protocol and spec.
 
Preferred Qualifications:
Experience with post-silicon enabling and bring-up. Using Lab Equipment. Some programming and scripting languages (C, Assembly, Perl, Python, etc.). Basic debug skills to isolate issues between boards, sockets, and devices. Knowledge of TCU, PVT, Fmax, Vmin test methodology and hands-on experience.
 
Education:
Required: Bachelor's, Computer Engineering and/or Electrical Engineering
Preferred: Master's, Computer Engineering and/or Electrical Engineering
 
 
Technical Recruiter
Novus Resources
resumes@novus-resources.com  


 
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