Physical Design & STA Engineer

Location: Santa Clara, CA
Date Posted: 08-29-2018
Join the team of one of the leading semiconductor companies in the business.
This is a great way to get your foot in the door!
Located in Santa Clara, CA
$58 to $73/hour
Are you an expert in Physical Design, STA and timing closure? We want to talk to you!
In order to keep up with the increasing demand for our client’s products, we are seeking a highly motivated Engineer to help our team release quality products with a short time to market.
Our client is a world leading provider of wireless and wired technologies for the mobile, networking, computing and consumer electronics markets. They are focused on inventing technologies that connect and empower people in ways that are elegant and accessible to all. Location technology and location-based services have become essential to modern living and are central to the mobile user experience.
Minimum Qualifications:
5 year’s experience in:
  • Physical Design and STA and timing closure be expert and have good understanding of
  • STA and timing closure methodologies and techniques
  • hand-on experience in timing closure of complex design (IP and SoC level)
  • ability to write timing eco to close challenging timing violations
  • Good understanding of physical design flow and their impact on timing closure ability to deal with MSM.
  • Top level complexity from FP, Placement, CTS, Routing and timing closure must be able to take the Hardmacro through P&R from Netlist to GDS including timing closure and Physical verification.
  • Bachelor's, Computer Engineering
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