Physical Design Engineer

Location: Raleigh, North Carolina (NC)
Date Posted: 09-20-2016
Novus is searching for a candidate that will perform Netlist to GDSII implementation of digital designs at the macro or core level. The candidate will be responsible for completion of tasks that include floor planning and partitioning, synthesis, formal verification, place and route, clock tree synthesis, power grid analysis, signal integrity analysis and timing closure.

  • 3-5 years experience in Physical Design.
  • Must have experience with taping out chips using 45nm or below.
  • Must have experience with the complete physical design flow using EDA tools Synopsys (Primetime, ICC is a must), Magma (Talus), Mentor Graphics (Caliber), and Cadence (First Encounter, Virtuoso, Conformal)

Required: Bachelor's, Electrical Engineering or equivalent experience
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