Security Verification Engineer

Location: San Diego, CA
Date Posted: 01-20-2017
 
Join our Security IP Verification Team responsible for first pass Silicon success, primarily focusing on security IPs such as cryptographic accelerator, RNG (random number generator), feature & debug controller,etc. Will be responsible for writing Test Plan, developing Test Bench, Test cases. Will be responsible for analyzing Code Coverage, Functional Coverage and Assertions. Use industry standard tools, methodologies


Experience in design verification using C, SV/UVM, Perl scripting Experience in Test Plan creation and Verification methodologies like Code Coverage, Functional Coverage and Assertions. Excellent debugging and problem solving skills


Expertise in AMBA protocols like AXI/AHB/APB and experience in working with ARM Processors. ARM Architecture knowledge, Cache coherency concepts is plus. Having worked on ATE pattern generation is desirable. Post Si support/debug would be a plus. Experience in Low Power Verification is a plus. Experience in security algorithm is a plus Experience with industry standard simulation (VCS/MTI/IUS), debug (Verdi), and regression mapping (Vmanager) tools desirable Experience in Jasper based formal verification is a plus Experience in Perspec / SSV / SVR is a plus


Required: Bachelor's, Electrical Engineering
Preferred: Master's, Electrical Engineering or equivalent experience
 
Technical Recruiter
Novus Resources
resumes@novus-resources.com  


 
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