ECC Verification Engineer

Location: Austin, TX
Date Posted: 04-23-2017

Develop verification testbench and collateral required to verify the addition ECC logic into an existing L2 memory design.

Prior experience with testbench development and verification of ECC logic using SystemVerilog 10 years or more experience with digital design verification

Proven ability to develop and deliver a clean, easy to maintain verification environments.

Educational background in Computer Architecture, Digital Design, and Digital Verification
Technical Recruiter
Novus Resources  

this job portal is powered by CATS