ASIC Power Grid Integrity Engineer

Location: Burlington, VT
Date Posted: 06-13-2017
Novus' customer is looking for a strong technical leader to join their world-class ASIC methodology development team! The ideal candidate will have experience implementing or using industry-standard software tools and flows for IC design, and demonstrate proficiency in computer programming using a scripting language like Tcl, perl (or equivalent).

The power grid integrity engineer is a challenging and cutting-edge position working as part of a team to define and implement a set of qualified design flow tools to be used on state-of-the-art silicon designs. You will be working with internal chip design methodology teams, external tool vendors and internal product teams as they develop SoC solutions utilizing CMOS cell-based ASIC technologies.
Essential Responsibilities:  
  • Develop and qualify power analysis and power grid static IR/EM and transient noise integrity analysis flows, using vendor tools to support multiple ASIC designs
  • Write, test and debug scripts to integrate tools, models, and any custom function into an integrated and cohesive design flow
  • Work with ASIC IP providers to define and implement the cell-level models  necessary for power and power-grid analysis
  • Assess IR drop and EM reliability results on customer chips and work with design center engineers to determine best settings to optimize accuracy, performance and memory
  • Work effectively with global team and be self-motivated to solve problems and manage deliverables
  • Generate clear documentation and easy to use scripts
  • Communicate clearly both verbally and in writing
Required Qualifications:
  • Education – Must have a BS + 5 years experience or MS + 3 years experience in Electrical Engineering
  • Experience
    • Netlist-based leakage and dynamic power analysis experience
    • Experienced user of industry-standard tools (e.g., Apache Redhawk, Cadence Voltus or Synopsys PrimeTime-PX) for power and power grid analysis
    • Strong understanding of electrical engineering fundamentals, including linear circuits
    • Strong understanding of power-supply analysis and power-grid reliability
    • Strong experience with scripting languages (e.g. Tcl/Tk, Perl, ksh, Python) to produce a documented, user-friendly suite of tools
    • Familiarity with device performance sensitivity to voltage variation and power noise impact on static timing
  • Language Fluency – Fluent in English Language – written & verbal
  • Physical Capacity Demands – N/A
  • Travel < 5%
Preferred Qualifications:
  • Experience using Cadence Inovus and Voltus tools
  • Experience with Linux Operating System
Additional Eligibility Qualifications:
Offer conditioned upon the  successful completion of a background check and drug screen, as applicable and subject to applicable laws and regulations.
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